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? semiconductor components industries, llc, 2002 may, 2002 rev. 2 1 publication order number: ncp4561/d ncp4561 ultra low-noise low dropout voltage regulator with 1.0 v on/off control the ncp4561 is a low dropout (ldo) regulator featuring excellent noise performances. thanks to its innovative concept, the circuit reaches an incredible 40 vrms noise level without an external bypass capacitor. housed in a small sot23 5 leadslike package, it represents the ideal designer's choice when space and noise are at premium. the absence of external bandgap capacitor unleashes the response time to a wakeup signal and makes it stay within 40 s (in repetitive mode), pushing the ncp4561 as a natural candidate in portable applications. the ncp4561 also hosts a novel architecture which prevents excessive undershoots when the regulator is the seat of fast transient bursts, as in any bursting systems. finally, with a static line regulation better than 75 db, it naturally shields the downstream electronics against choppy lines. features ? ultra lownoise: 150 nv/ hz @ 100 hz, 40 vrms 100 hz 100 khz typical, iout = 60 ma, c o = 1.0 f ? fast response time from off to on: 40 s typical at a 200 hz repetition rate ? ready for 1.0 v platforms: on with a 900 mv high level ? nominal output current of 80 ma with a 100 ma peak capability ? typical dropout of 90 mv @ 30 ma, 160 mv @ 80 ma ? ripple rejection: 70 db @ 1.0 khz ? 1.5% output precision @ 25 c ? thermal shutdown applications ? noise sensitive circuits: vcos rf stages, etc. ? bursting systems (tdma phones) ? all battery operated devices figure 1. simplified block diagram thermal shutdown on/off band gap reference *current limit *antisaturation protection *load transient improvement v out v in gnd nc on/ off 4 5 2 3 1 tsop5 sn suffix case 483 1 5 pin connections and marking diagram 1 3v out on/off 2 gnd nc 4 v in 5 p28 = device code y = year w = work week (top view) p28yw device voltage output* shipping ordering information NCP4561SN28T1 2.8 v 3000/tape & reel * contact your on semiconductor sales representative for other output voltage values. http://onsemi.com
ncp4561 http://onsemi.com 2 pin function descriptions pin # pin name function description 1 on/off shuts or wakesup the ic a 900 mv level on this pin is sufficient to start the ic. a 150 mv shuts it down. 2 gnd the ic's ground 3 nc none it makes no arm to connect the pin to a known potential, like in a pintopin replacement case. 4 v out delivers the output voltage this pin requires a 1.0 f output capacitor to be stable. 5 v in powers the ic a positive voltage up to 12 v can be applied upon this pin. maximum ratings value rating pin # symbol min max unit power supply voltage 5 v in 12 v esd capability, hbm model all pins 1.0 kv esd capability, machine model all pins 200 v maximum power dissipation nw suffix, plastic package thermal resistance junctiontoair p d r ja internally limited 210 w c/w operating ambient temperature maximum junction temperature (note 1) maximum operating junction temperature (note 2) t a t jmax t j 40 to +85 150 125 c storage temperature range t stg 60 to +150 c electrical characteristics (for typical values t a = 25 c, for min/max values t a = 40 c to +85 c, max t j = 125 c unless otherwise noted) characteristics pin # symbol min typ max unit logic control specifications input voltage range 1 v on/off 0 v in v on/off input resistance 1 r on/off 250 k on/off control voltages (note 3) logic zero, off state, i o = 50 ma logic one, on state, i o = 50 ma 1 v on/off 900 150 mv currents parameters current consumption in off state off mode current: v in = v out + 1.0 v, i o = 0, v off = 150 mv iq off 0.1 2.0 a current consumption in on state on mode current: v in = v out + 1.0 v, i o = 0, v on = 3.5 v iq on 180 a current consumption in on state, on mode saturation current: v in = v out 0.5 v, no output load iq sat 800 a current limit v in = vout nom + 1.0 v, output is brought to vout nom 0.3 v i max 100 180 ma 1. internally limited by shutdown. 2. specifications are guaranteed below this value. 3. voltage slope should be greater than 2.0 mv/ s.
ncp4561 http://onsemi.com 3 electrical characteristics (continued) (for typical values t a = 25 c, for min/max values t a = 40 c to +85 c, max t j = 125 c unless otherwise noted) characteristics pin # symbol min typ max unit output voltages v out + 1.0 v < v in < 6.0 v, t a = 25 c, 1.0 ma < i out < 80 ma 4 v out 2.758 2.8 2.842 v v out + 1.0 v < v in < 6.0 v, t a = 40 c to +85 c, 1.0 ma < i out < 80 ma 4 v out 2.716 2.8 2.884 v line and load regulation, dropout voltages line regulation v out + 1.0 v < v in < 12 v, i out = 80 ma 4/5 reg line 20 mv load regulation v in = v out + 1.0 v, c out = 1.0 f, i out = 1.0 to 80 ma 4 reg load 40 mv dropout voltage (note 4) i out = 30 ma i out = 60 ma i out = 80 ma 4 4 4 v in v out v in v out v in v out 90 140 160 150 200 250 mv dynamic parameters ripple rejection v in = v out + 1.0 v + 1.0 khz 100 mvpp sinusoidal signal 4/5 ripple 70 db output noise density @ 1.0 khz 4 150 nv/ hz rms output noise voltage c out = 1.0 f, i out = 50 ma, f = 100 hz to 1.0 mhz 4 noise 35 v output rise time c out = 1.0 f, i out = 50 ma, 10% of rising on signal to 90% of nominal v out 4 t rise 40 s thermal shutdown thermal shutdown 125 c 4. v out is brought to v out 100 mv.
ncp4561 http://onsemi.com 4 definitions load regulation the change in output voltage for a change in output current at a constant chip temperature. dropout voltage the input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. measured when the output drops 100 mv below its nominal value (which is measured at 1.0 v differential value). the dropout level is affected by the chip temperature, load current and minimum input supply requirements. output noise voltage this is the integrated value of the output noise over a specified frequency range. input voltage and output current are kept constant during the measurement. results are expressed in vrms. maximum power dissipation the maximum total dissipation for which the regulator will operate within its specs. quiescent current the quiescent current is the current which flows through the ground when the ldo operates without a load on its output: internal ic operation, bias, etc. when the ldo becomes loaded, this term is called the ground current. it is actually the difference between the input current (measured through the ldo input pin) and the output current. line regulation the change in output voltage for a change in input voltage. the measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. one usually distinguishes static line regulation or dc line regulation (a dc step in the input voltage generates a corresponding step in the output voltage) from ripple rejection or audio susceptibility where the input is combined with a frequency generator to sweep from a few hertz up to a defined boundary while the output amplitude is monitored. thermal protection internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated at typically 125 c, the regulator turns off. this feature is provided to prevent catastrophic failures from accidental overheating. maximum package power dissipation the maximum power package power dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125 c. depending on the ambient temperature, it is possible to calculate the maximum power dissipation and thus the maximum available output current.
ncp4561 http://onsemi.com 5 typical characteristics 200 190 205 195 185 210 2.795 0 5.000 60 3.500 40 20 ground current (ma) 0.000 ambient temperature ( c) figure 2. ground current vs. output current figure 3. quiescent current vs. temperature quiescent current ( a) 0 200 150 100 50 80 60 40 0 20 100 figure 4. dropout vs. output current output current (ma) figure 5. output voltage vs. output current output current (ma) output voltage (v) dropout (mv) 6.000 60 20 100 080 60 40 20 100 2.775 2.800 2.770 2.780 2.755 2.805 2.810 40 c output current (ma) 2.500 3.000 4.000 4.500 5.500 80 100 2.000 1.500 0.500 1.000 40 20 0 40 60 80 2.765 2.760 2.785 2.790 25 c 85 c 40 c 25 c 85 c 40 c 25 c 85 c figure 6. dropout voltage vs. temperature 180 160 120 140 100 80 0 temperature ( c) dropout voltage ( m v) 60 20 0 20 40 40 100 80 ma 60 ma 30 ma 60 40 20 60 80 100 10 1 1000 frequency (khz) noise (nv/sqrt hz) 0.01 10 100 0 rms noise 10 hz to 100 khz: 36 v 10 hz to 1 mhz: 47 v 0.1 1 100 v in = v out + 1 c out = 1 f i o = 10 & 50 ma figure 7. typical noise density performance output noise spectral density
ncp4561 http://onsemi.com 6 10 22.50 10 k 45.00 1 k 100 67.50 7.50 v in = v out + 1 c out = 1 f i load = 10 ma frequency (hz) 60.00 52.50 37.50 30.00 15.00 100 k 1 m mag (db) figure 8. typical ripple rejection performance (i load = 10 ma) 22.50 45.00 67.50 7.50 60.00 52.50 37.50 30.00 15.00 mag (db) frequency (hz) 10 10 k 1 k 100 100 k 1 m power supply rejection ratio pssr (db) figure 9. typical ripple rejection performance (i load = 60 ma) pssr (db) power supply rejection ratio v in = v out + 1 c out = 1 f i load = 60 ma
ncp4561 http://onsemi.com 7 application hints input decoupling as with any regulator, it is necessary to reduce the dynamic impedance of the supply rail that feeds the component. a 1.0 f capacitor either ceramic or tantalum is recommended and should be connected close to the ncp4561 package. higher values will correspondingly improve the overall line transient response. output decoupling thanks to a novel concept, the ncp4561 is a stable component and does not require any specific equivalent series resistance (esr) neither a minimum output current. capacitors exhibiting esrs ranging from a few m up to 3.0 can thus safely be used. the minimum decoupling value is 1.0 f and can be augmented to fulfill stringent load transient requirements. the regulator accepts ceramic chip capacitors as well as tantalum devices. noise decoupling unlike other ldos, the ncp4561 is a true lownoise regulator. without the need of an external bypass capacitor, it typically reaches the incredible level of 40 vrms overall noise between 100 hz and 100 khz. to give maximum insight on noise specifications, on semiconductor includes spectral density graphics. the classical bypass capacitor impacts the startup phase of standard ldos. however, thanks to its lownoise architecture, the ncp4561 operates without a bypass element and thus offers a typical 40 s startup phase. protections the ncp4561 hosts several protections, giving natural ruggedness and reliability to the products implementing the component. the output current is internally limited to a maximum value of 180 ma typical while temperature shutdown occurs if the die heats up beyond 125 c. these values let you assess the maximum differential voltage the device can sustain at a given output current before its protections come into play. the maximum dissipation the package can handle is given by: p max t jmax t a r ja if t jmax is limited to 125 c, then the ncp4561 can dissipate up to 470 mw @ 25 c. the power dissipated by the ncp4561 can be calculated from the following formula: ptot v in i gnd (i out ) v in v out i out or vin max ptot v out i out i gnd i out if a 80 ma output current is needed, the ground current is extracted from the datasheet curves: 4.0 ma @ 80 ma. for a NCP4561SN28T1 (2.8 v) delivering 80 ma and operating at 25 c, the maximum input voltage will then be 8.3 v.
ncp4561 http://onsemi.com 8 typical applications the following figure portrays the typical application of the ncp4561. figure 10. a typical application schematic sw* 1 3 2 4 5 ncp4561 r1 100 k on/off + c3 1.0 f + c2 1.0 f dropout charge output input *enables the ic when closed pcb layout considerations as for any low noise designs, particular care has to be taken when tackling printed circuit board (pcb) layout. the figure below gives an example of a layout where stray inductances/capacitances are minimized. this layout is the basis for the ncp4561 performance evaluation board. the bnc connectors give the user an easy and quick evaluation mean. on/off in + _ out dropout on semiconductor in off on + _ out on semiconductor ncp4561 evaluation board ncp4561 evaluation board figure 11. pcb layout
ncp4561 http://onsemi.com 9 understanding the load transient improvement the ncp4561 features a novel architecture which allows the user to easily implement the regulator in burst systems where the time between two current shots is kept very small. the quality of the transient response time is related to many parameters, among which the closedloop bandwidth with the corresponding phase margin plays an important role. however, other characteristics also come into play like the series pass transistor saturation. when a current perturbation suddenly appears on the output, e.g. a load increase, the error amplifier reacts and actively biases the pnp transistor. during this reaction time, the ldo is in openloop and the output impedance is rather high. as a result, the voltage brutally drops until the error amplifier effectively closes the loop and corrects the output error. when the load disappears, the opposite phenomenon takes place with a positive overshoot. the problem appears when this overshoot decays down to the ldo steadystate value. during this decreasing phase, the ldo stops the pnp bias and one can consider the ldo asleep. if by misfortune a current shot appears, the reaction time is incredibly lengthened and a strong undershoot takes place. this reaction is clearly not acceptable for line sensitive devices, such as vcos or other radiofrequency parts. this problem is dramatically exacerbated when the output current drops to zero rather than a few ma. in this later case, the internal feedback network is the only discharge path, accordingly lengthening the output voltage decay period. the ncp4561 cures this problem by implementing a clever design where the ldo detects the presence of the overshoot and forces the system to go back to steadystate as soon as possible, ready for the next shot, which positively improves the response time and decreases the negative peak voltage. ncp4561 has a fast startup phase thanks to the lack of bypass capacitor the ncp4561 is able to supply its downstream circuitry as soon as the off to on signal appears. in a standard ldo, the charging time of the external bypass capacitor hampers the response time. a simple solution consists in suppressing this bypass element but, unfortunately, the noise rises to an unacceptable level. ncp4561 offers the best of both worlds since it no longer includes a bypass capacitor and starts in less than 40 s typically (repetitive at 200 hz). it also ensures a lownoise level of 40 vrms 100 hz100 khz. the following picture details the typical ncp4561 startup phase. on/off pin voltage 1 v/div ch3 1.00 v ch4 500 mv m 10.0 s ch3 1.82 v figure 12. startup waveform (conditions: v in = 3.8 v, i load = 10 ma, c out = 1 f) c4 high 2.78 v c4 mean 2.426 v tek run: 5.00 ms/s sample v out 500 mv/div
ncp4561 http://onsemi.com 10 typical transient responses c4 max 2.800 v c4 mean 2.7840 v tek run: 1.00 ms/s sample ch2 20.0 mv ch4 200 mv c4 min 2.720 v v out 200 mv/div i load 20 ma/div m 50.0 s ch2 38.4 mv figure 13. load current is pulsed from 0 to 40 ma (conditions: v in = 3.8 v, c out = 1 f ) fi g ure 14. load current is pulsed from 0 to 80 ma (conditions: v in = 3.8 v, c out = 1 f ) c4 max 2.844 v c4 mean 2.7852 v c4 min 2.708 v ch1 20.0 mv ch4 200 mv m 50.0 s ch1 78.8 mv tek run: 1.00 ms/s sample v out 200 mv/div i load 20 ma/div
ncp4561 http://onsemi.com 11 typical transient responses c4 max 2.824 v c4 mean 2.7848 v tek run: 1.00 ms/s sample ch2 20.0 mv ch4 200 mv c4 mean 2.776 v m 50.0 s ch2 38.4 mv figure 15. load current is switched from 40 to 0 ma (conditions: v in = 3.8 v, c out = 1 f ) figure 16. load current is switched from 80 to 0 ma (conditions: v in = 3.8 v, c out = 1 f ) v out 200 mv/div i load 20 ma/div c4 max 2.844 v c4 mean 2.7848 v tek stop: 1.00 ms/s 1930 acgs ch1 20.0 mv ch4 200 mv c4 min 2.708 v m 50.0 s ch1 0 v v out 200 mv/div i load 20 ma/div
ncp4561 http://onsemi.com 12 minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. inches mm 0.028 0.7 0.074 1.9 0.037 0.95 0.037 0.95 0.094 2.4 0.039 1.0 tsop5 (tsop5 is footprint compatible with sot235) ordering information device voltage output* package shipping NCP4561SN28T1 2.8 v tsop5 3000 units /tape & reel *contact your on semiconductor sales representative for other output voltage values.
ncp4561 http://onsemi.com 13 package dimensions tsop5 sn suffix plastic package case 48301 issue b notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. dim min max min max inches millimeters a 2.90 3.10 0.1142 0.1220 b 1.30 1.70 0.0512 0.0669 c 0.90 1.10 0.0354 0.0433 d 0.25 0.50 0.0098 0.0197 g 0.85 1.05 0.0335 0.0413 h 0.013 0.100 0.0005 0.0040 j 0.10 0.26 0.0040 0.0102 k 0.20 0.60 0.0079 0.0236 l 1.25 1.55 0.0493 0.0610 m 0 10 0 10 s 2.50 3.00 0.0985 0.1181 0.05 (0.002) 123 54 s a g l b d h c k m j
ncp4561 http://onsemi.com 14 notes
ncp4561 http://onsemi.com 15 notes
ncp4561 http://onsemi.com 16 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. ncp4561/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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